MemryX MX3

schematics

none

toolchain

partial (open runtime (MxAccl) + utils + driver mirror, closed NeuralCompiler)

datasheets

public

blobs

required (proprietary silicon)

retail

open_market (Amazon/Mouser ~$149)

Proprietary dataflow silicon with public datasheets, retail availability, and several open source runtime/driver repos, though the compiler core is closed.

• https://developer.memryx.com/specs/M.2_datasheet.html recorded 2026-08-13

  openly published MX3 M.2 module datasheet - "MemryX MX3 (x4)" AI processor, PCIe Gen 3 2-lane interface, M.2-2280-D5-M form factor, operating range and CE/FCC Class A and RoHS compliance, plus pinout, placement, power-rail, clock and strap-pin tables; no board design files are offered

• https://github.com/memryx/MxAccl recorded 2026-08-13

  "open-source code for both the MemryX C++ runtime library and the acclBench benchmarking tool" under MPL-2.0, with the SDK it depends on supplying "precompiled libraries, drivers, and tools"

• https://www.tomshardware.com/tech-industry/artificial-intelligence/memryx-launches-usd149-mx3-m-2-ai-accelerator-module-capable-of-24-tops-compute-power recorded 2026-08-13

  "The MX3 M.2 module is available for $149 USD, making it an affordable option for developers and organizations seeking to add AI processing capabilities to edge devices"

Low-cost retail availability (Amazon, Mouser), independent reviews, a 2025 industry award and an active GitHub org point to growing but emerging traction. Tom's Hardware's launch coverage puts the module at $149 but names no distributor, so the Amazon and Mouser half of that availability is not confirmable from any source cited here.

• https://www.tomshardware.com/tech-industry/artificial-intelligence/memryx-launches-usd149-mx3-m-2-ai-accelerator-module-capable-of-24-tops-compute-power recorded 2026-08-13

  "The MX3 M.2 module is available for $149 USD"; a technology start-up originating from the University of Michigan; no distributor is named

• https://github.com/memryx/MxAccl recorded 2026-08-13

  live public repository for the MemryX C++ runtime and acclBench benchmarking tool

Moderate throughput with flexible precision, but on-chip parameter capacity caps deployable model size. The M.2 datasheet no longer carries a TOPS figure, a data-format list or a parameter-capacity number at all - its specification table is now system, electrical, mechanical, environmental and compliance only. The throughput half of the recorded value rests instead on the launch coverage, which reads "Each MX3 chip is said to deliver 6 TOPS ... offering a total of up to 24 TOPS" and "particularly those optimized for 8-bit weights". The 4/8/16-bit plus BFloat16 format list and the ~42M-parameter capacity are supported by no source cited here. The band holds - 24 TOPS still sits above the 6 TOPS SBCs and below the Jetson Orin line.

• https://www.tomshardware.com/tech-industry/artificial-intelligence/memryx-launches-usd149-mx3-m-2-ai-accelerator-module-capable-of-24-tops-compute-power recorded 2026-08-13

  "Each MX3 chip is said to deliver 6 TOPS (Tera Operations Per Second), offering a total of up to 24 TOPS of compute power"; four MX3 chips on a standard M.2 2280 module; "particularly those optimized for 8-bit weights"

• https://developer.memryx.com/specs/M.2_datasheet.html recorded 2026-08-13

  "MemryX MX3 (x4)" as the module's AI processor and "The 4 MX3 chips appear as one logical unit to the NeuralCompiler and runtime software stack"; the table no longer lists TOPS, data formats or parameter capacity