AI Potluck
Infrastructure / Edge AI hardware

Google Coral Dev Board

Google

A single-board computer from Google's Coral platform that pairs a removable System-on-Module (NXP i.MX 8M SoC) with a baseboard and integrates Google's Edge TPU ASIC. The Edge TPU delivers 4 TOPS at about 2 TOPS/watt, accelerating int8-quantized TensorFlow Lite models for local inference. It is aimed at prototyping edge AI that can scale to production by reusing the SoM. The Edge TPU is designed and supplied by Google.

Verified live 2026-06-22 via primary sources. Public datasheet and open runtime/TFLite path, but the Edge TPU silicon and the model compiler are proprietary closed binaries.

Openness

3 high confidence
3.0
schematics
none (no full board files)
toolchain
partial (open runtime (libedgetpu) + TFLite, closed Edge TPU compiler)
datasheets
public
blobs
required (proprietary Edge TPU ASIC + closed compiler)
retail
open_market (broadly purchasable)

Public datasheet and open runtime/TFLite path, but the Edge TPU silicon and the model compiler are proprietary closed binaries.

Adoption

4 medium confidence
4.0

Long-established, widely distributed edge-AI dev platform with an active google-coral GitHub org; the older edgetpu repo was archived April 2026 with libedgetpu now maintained.

Capability

2 high confidence
2.0

Modest 4 TOPS limited to int8 TFLite models; suited to small CNN inference rather than large or generative models.

Unchanged since 2026-08-01 (last edited, not re-checked)