Sipeed MaixCAM
SipeedA compact AI vision and audio dev board built around the SOPHGO SG2002 SoC (a 1 GHz RISC-V C906 big core plus a 700 MHz small core) with a 1 TOPS INT8 NPU that also supports BF16 models, 256MB DDR3, a 2.3-inch IPS touchscreen, and dual MIPI-CSI camera input. It is programmed via the open source MaixPy (Python) and MaixCDK (C/C++) SDKs and sold through Taobao/AliExpress. It matters as an ultra-low-cost RISC-V edge-AI vision module with strong open tooling.
Verified live 2026-06-22 via primary sources. Open Apache-2.0 SDKs, public schematics/datasheets, and global retail availability, though the SG2002 silicon itself is proprietary.
Openness
4 high confidence- schematics
- published (available via wiki/GitHub)
- toolchain
- open (fully open (MaixPy/MaixCDK, Apache-2.0))
- datasheets
- public (public on wiki)
- blobs
- required (SG2002 silicon proprietary)
- retail
- open_market (global via AliExpress/Taobao)
Open Apache-2.0 SDKs, public schematics/datasheets, and global retail availability, though the SG2002 silicon itself is proprietary.
- https://wiki.sipeed.com/hardware/en/maixcam/maixcam.html recorded 2026-06-22
spec page: SG2002 RISC-V, 1 TOPS NPU, 256MB DDR3, open schematics/datasheets, MaixPy/MaixCDK
- https://github.com/sipeed/MaixPy recorded 2026-06-22
open source (Apache-2.0) Python SDK for MaixCAM
Adoption
3 medium confidenceSold globally via AliExpress/Taobao with an active MaixPy/MaixHub community, but reach is concentrated among hobbyist and RISC-V edge-AI developers.
- https://github.com/sipeed/MaixPy recorded 2026-06-22
active open source repo and release cadence
Capability
2 high confidence1 TOPS and only 256MB RAM suit lightweight vision/audio models, the lowest compute tier among these devices.
- https://wiki.sipeed.com/hardware/en/maixcam/maixcam.html recorded 2026-06-22
1 TOPS@INT8 NPU, RISC-V C906 1GHz, 256MB DDR3
Unchanged since 2026-08-01 (last edited, not re-checked)